On chip power supply

ABSTRACT

A technique, for drawing power from the external signal circuit to power on-chip elements for an integrated circuit diode (ICD), utilizes an integrated diode and capacitor. The capacitor is charged by the external applied voltage during the time the ICD blocks the external current flow. The charged capacitor then acts as a battery to power the on-chip circuits to provide active control for the ICD function. This ICD could be provided as a two terminal discrete diode, or integrated onto a larger IC. This same technique can be utilized for a “self powered” MOSFET IC (ICM), utilizing a low power logic signal to trigger an internal circuit which would provide a much larger gate drive than the logic signal could provide. This could also be provided as discrete three terminal components, or integrated into a larger IC.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the benefit of U.S. Provisional PatentApplication No. 60/451,060 filed Feb. 26, 2003.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to integrated circuit semiconductor diodesand transistors.

2. Prior Art

Semiconductor devices tend to be divided into discrete components andintegrated circuits. The discrete devices include single functioncomponents such as bipolar transistors, junction field effecttransistors, surface field effect transistors, silicon controlledrectifiers, etc. and some integrated components such as insulated gatebipolar transistors. One characteristic that is common to all thediscrete components is the lack of external power supply requirements.

Recently a new form of discrete circuit has entered the market; a highlyefficient diode made from surface field effect transistors, anintegrated circuit diode (ICD). This circuit in its present form(passive form) does not utilize any on-chip drive circuitry; however,with the addition of either external or internal power, these circuitscan improve their performance dramatically by utilizing on-chipcircuitry to actively drive the transistor gates (active form).

Utilizing external power for this purpose tends to be less attractivebecause of the added circuit board complexity. However, it does have theadvantage of not altering the external signal while drawing the chargeneeded for the onboard supply voltage. In most applications, the addedconvenience of the self-powered circuit would be advantageous.

In typical semiconductor diodes, conduction in the forward direction islimited to leakage current values until the forward voltage bias reachesa characteristic value for the particular type of semiconductor device.By way of example, silicon pn junction diodes don't conductsignificantly until the forward bias voltage is approximately 0.6 to 0.7volts. Many silicon Schottky diodes, because of the characteristics ofthe Schottky barrier, can begin to conduct at lower voltages, such as0.4 volts. Germanium pn junction diodes have a forward conductionvoltage drop of approximately 0.3 volts at room temperature. However,the same are rarely used, not only because of their incompatibility withsilicon integrated circuit fabrication, but because of temperaturesensitivity and other undesirable characteristics thereof.

In some applications, diodes are used not for their rectifyingcharacteristics, but rather to be always forward biased to provide theircharacteristic forward conduction voltage drop. For instance, inintegrated circuits, diodes or diode connected transistors arefrequently used to provide a forward conduction voltage dropsubstantially equal to the base-emitter voltage of another transistor inthe circuit.

In circuits that utilize the true rectifying characteristics ofsemiconductor diodes, the forward conduction voltage drop of the diodeis usually a substantial disadvantage. By way of specific example, in aDC to DC step-down converter, a transformer is typically used wherein asemiconductor switch controlled by an appropriate controllerperiodically connects and disconnects the primary of the transformerwith a DC power source. The secondary voltage is connected to aconverter output, either through a diode for its rectifyingcharacteristics, or through another semiconductor switch. The controllervaries either the duty cycle or the frequency of the primary connectionto the power source as required to maintain the desired output voltage.If a semiconductor switch is used to connect the secondary to theoutput, the operation of this second switch is also controlled by thecontroller; one form of this switch configuration circuit is called asynchronous rectifier.

Use of a semiconductor switch to couple the secondary to the output hasthe advantage of a very low forward conduction voltage drop, and has thedisadvantage of requiring careful timing control throughout theoperating temperature range of the converter to maintain the efficiencyof the energy transfer from primary to secondary. Timing of theswitching action for the primary versus the secondary is critical andmust take into account the phase delays of the transformer and otherelements. These circuits are obviously very costly.

The use of a semiconductor diode for this purpose has the advantage ofeliminating the need for control of a secondary switch, but has thedisadvantage of imposing the forward conduction voltage drop of thesemiconductor diode on the secondary circuit. This has at least two verysubstantial disadvantages. First, the forward conduction voltage drop ofthe semiconductor diode device can substantially reduce the efficiencyof the converter. For instance, newer integrated circuits commonly usedin computer systems are designed to operate using lower power supplyvoltages, such as 3.3 volts, 3 volts and 2.7 volts. In the case of a 3volt power supply, the imposition of a 0.7 volt series voltage dropmeans that the converter is in effect operating into a 3.7 volt load,thereby limiting the efficiency of the converter to 81%, even beforeother circuit losses are considered.

Second, the efficiency loss described above represents a power loss inthe diode, resulting in the heating thereof. This limits the powerconversion capability of an integrated circuit converter, and in manyapplications requires the use of a discrete diode with a heat sink ofadequate size, increasing the overall circuit size and cost. Obviouslyany improvement in the forward voltage drop will have a major impact onthe overall circuit performance.

Another commonly used circuit for AC to DC conversion is the full wavebridge rectifier usually coupled to the secondary winding of atransformer having the primary thereof driven by the AC power source.Here two diode voltage drops are imposed on the peak DC output, makingthe circuit particularly inefficient using conventional diodes, andincreasing the heat generation of the circuit requiring dissipationthrough large discrete devices, heat dissipating structures, etc.depending on the DC power to be provided.

Therefore, a semiconductor diode having a low forward conduction voltagedrop would be highly advantageous to use as a rectifying element incircuits wherein the diode will be subjected to both forward and reversebias voltages from time to time. While such a diode may find manyapplications in discrete form, it would be further desirable for such adiode to be compatible with integrated circuit fabrication techniques sothat the same could be realized in integrated circuit form as part of amuch larger integrated circuit. Further, while reverse current leakageis always undesirable and normally must be made up by additional forwardconduction current, thereby decreasing circuit efficiency, reversecurrent leakage can have other and more substantial deleterious affectson some circuits. Accordingly, it would also be desirable for such asemiconductor diode to further have a low reverse bias leakage current.

The ICD in its passive form provides lower forward voltages thanSchottky diodes, with enhanced reliability at a competitive price. Theyalso provide an attractive alternative for the higher voltage portion ofthe synchronous rectifier market; however, they are not able to replacethe entire synchronous rectifier market.

BRIEF SUMMARY OF THE INVENTION

The present invention provides circuits and methods that, whenintegrated into an IC, will provide an on-chip power source to runcontrol circuits on the IC. It draws its power from the applied signalduring the “off” portion of the IC's cycle. For example, in the case ofan IC behaving as a rectifier, the circuit will utilize the largereverse voltage during the off state of the rectifier to draw power forthe supply. In the case of an IC behaving as a transistor, which doesnot have a reversal of the applied potential, the power supply will drawits power during the “off” state when a large bias is formed across theIC.

During the “on” state of these IC's, the power supply will provide powerto drive the control circuits which can be used to generate a moreconductive “on” state, and a lower leakage “off” state. In the case ofan ICD, the forward voltage can be significantly reduced, to a levelequivalent to or better than that of a synchronous rectifier. In thecase of a surface field effect transistor IC, the gate drive can besubstantially enhanced, providing a reduced “on resistance” whichequates to forward voltage reduction.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic drawing of the prior art ICD. “Signal 1” (Cathode)and “Signal 2” (Anode) are the normal input signals, such as a sine waveor square wave, to the diode. The “Passive ICD” is an n-channel MOSFETdevice that behaves as a diode.

FIG. 2 presents the addition of a capacitor and diode to the ICD chip.This allows the capacitor to charge and act as a battery, powering thecontrol circuitry to run the ICD gate.

FIG. 2A presents the same concept as FIG. 2 except the diode is moved tothe other side of the capacitor. This inverts the polarity of the sensesignal, hence the − and + signs in FIGS. 2 and 2A.

FIG. 3 presents the same concept except driving a metal oxidesemiconductor field effect transistor. This Integrated Circuit MOSFET(ICM) device has external inputs corresponding to the source, drain, andgate.

FIGS. 4 and 4A present control circuits used with the + and − senseconfigurations, respectively.

FIG. 5 presents the same type of drive circuitry as in FIGS. 4 and 4Aexcept as modified for an n-channel MOSFET.

FIG. 6 presents a sample control circuit for a p-channel MOSFET.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring to FIG. 1, a prior art schematic diagram of an ICD (integratedcircuit diode) is presented. This device acts as a low forward voltagediode because of the gate connections, and the depletion thresholdvoltage. It is specifically designed to handle alternating polarities.It is obvious that the addition of an external power supply and controllogic would greatly enhance the functionality of this device by allowingthe gate to be driven well above the drain potential when conducting.

The device shown in FIG. 1 is an n-channel device. Normally, in aconventional field effect device, the body or backgate is connected tothe source of the charge carriers when the device is turned on. In thatregard, the source and drain labels, as used herein refer to the sourcebeing that region which is the source of the charge carriers when thedevice is turned on or conducting, and with the drain being the otherregion of the same conductivity type. Therefore, the charge carriersflow from the source through the channel to the drain during conduction.In the case of the ICD of FIG. 1, conduction occurs when signal 2 is ahigher voltage than signal 1. Since the Figure depicts an n-channeldevice, and with the foregoing definition of source and drain, it willbe noted that in the case of the passive integrated circuit diode (ICD),the body or backgate of the ICD is connected to the drain, not thesource. Also an ICD characteristically has a slightly negativethreshold. Thus, for an ICD, when the source and drain are at the samevoltage, the channel is somewhat conductive, though the current is zerobecause the source and drain are at the same voltage. For an n-channelICD, when the drain voltage is raised above the source voltage, theconduction along the channel will cause an IR drop in the channel, withthe channel close to the source having a voltage close to the sourcevoltage. Thus the gate-channel voltage increases in that region of thechannel, reducing the channel resistance. The effect is progressivealong the channel, so that most of the channel becomes closer to thesource voltage and thus more highly conductive. Consequently the overallchannel resistance becomes lower and lower as the drain voltageincreases, supporting high current levels with a relatively low forwardvoltage conduction drop. On the other hand, when the source voltage isabove the drain voltage, conduction in the channel causes the channelvoltage next to the source to be close to that of the source, and thusto have a gate channel voltage which causes a high channel resistance inthat area. Thus while leakage will increase with an increasing reversebias voltage on the ICD, the resistance of the channel will be high, andresistance of the channel will increase with increasing reverse biasvoltage, thereby increasing the resistance of the channel withincreasing reverse bias voltage, thereby limiting the rise in theleakage current with increasing reverse bias voltage. This is thestandard Id/Vds behavior of a MOSFET with a constant gate potential.

In usual diode terms, the Anode of a diode is the positive terminalduring forward conduction, and the Cathode is the negative terminal. Forthe n-channel ICD the forward conduction Drain corresponds to the Anode,and the Source which is the n-type substrate to the Cathode. If one wereto build a p-channel ICD the Anode would correspond to the Source whichis the p-type substrate, and the Cathode to the Drain. Due to carriermobility differences, our discussion of the ICDs will focus on then-channel device with the understanding that changing material types andcircuit polarities would produce a p-channel ICD.

For those skilled in the art, it is apparent that a JFET could besubstituted for the MOSFET to form the ICD and the ICM could also bemade in a JFET flavor.

In the disclosure to follow, passive n-channel ICDs and active n-channeland p-channel ICMs are referred to, the active devices being threeterminal devices with separate gate connections. These devices assume aMOSFET design and have the body or backgate of the ICDs connected to thedrain for the ICDs and the source for the ICMs.

The use of discrete MOSFETs driven by control logic circuitry is wellknown in the art; for example, synchronous rectifiers. The addition ofthe control logic to an IC is also well known, as is the integration ofon chip power supplies such as the back gate power supplies on IC'swhich provide a negative potential to the substrate to controltransistor thresholds; however, the integration of a self-containedpower supply into an IC without external power supply connections is newto the art. The present invention incorporates circuitry to the IC forthe purpose of on-chip charge storage, acting as an effective battery topower the control logic. The energy stored in the battery is extractedfrom the actual signal lines during the “off” state of the IC.

FIG. 2 is a schematic representation of an active ICD utilizing controlcircuitry to power its gate electrode. The energy to drive the controlcircuitry is extracted from the signal lines by the addition of acapacitor and a diode. The diode allows the capacitor to charge duringthe reverse bias condition for the ICD (off state, no current flow buthigh reverse voltage) and prevents a discharge of the capacitor when thepotential across the ICD drops below the charging potential, whether ornot the polarity actually reverses.

As can be seen, if there is an alternating voltage across the diode anda load (load is not shown) the peak to peak voltage will be stored onthe capacitor with the positive potential at the signal 1 side, and thenegative potential at the signal 2 side. This effectively acts as a halfwave rectifier circuit. Also, note that the control circuitry willrequire a sense line to synchronize its control activity with theapplied signal. This sense line must be isolated from the charge storagedevice. In the case of FIG. 2, the diode serves as the isolation,allowing the sense potential to follow signal 2 independently of thecapacitor.

FIG. 2A presents the configuration of FIG. 2 except the diode andcapacitor are reversed in position. This moves the sense connection tosignal 1; however, the polarity across the capacitor is not reversed.This configuration is arbitrarily identified with a “− sense” notationrelative to FIG. 2 with a “+ sense” notation. The function of thefinished ICD to the external circuit is the same for both the − and +sense configurations. It is only an internal design difference whichdistinguishes the two senses.

It is apparent that if a standard MOSFET is substituted into thiscircuit, implying that there is no change in the polarity of the signalvoltage, the diode can be reversed so that it will charge the capacitorduring the off state of the transistor. See FIG. 3 compared to FIG. 2.This will reverse the polarity on the capacitor, requiring appropriatemodification to the control circuitry. This configuration would allow aMOSFET transistor with no additional power connections to function witha very low apparent gate drive; utilizing that drive to trigger a muchlarger drive from the control circuitry. One of the design problemsassociated with power MOSFETs is providing adequate drive current fortheir large gate structures. The ICM eliminates this concern.

The control circuit may take many forms. The examples presented here arefor demonstrating the application of the invention rather than aspecific control circuitry. FIGS. 4 and 4A use identical controlcircuitry. Because of the different configuration of the diode andcapacitor, the supply lines are routed differently, and the sense linehas the polarity reversed. FIG. 4 uses the + sense configuration of FIG.2 while FIG. 4A uses the − sense configuration of FIG. 2A.

The control circuit is designed to take the sense input, and use it tocontrol the potential applied to the N-channel MOSFET gate. Resistors R3and R4 and transistors M1 and M2 form a bistable latch. The state of thelatch is determined by the potential of the sense signal (trigger signalin FIGS. 4 and 4A). Resistors R3 and R4 are pull-up resistors thatprovide power to maintain the state of the latch, while limiting thecharge drain on the internal power supply. In FIG. 4, a positive triggersignal turns on transistor M1, which in turn turns off transistor M2.This causes the resistor R4−transistor M2 node to go toward V+. TheZener diode limits the extent of this voltage excursion to its ratedzener voltage. This positive voltage turns on transistor M3, whosesource is connected to the gate of the active ICD. When the potential ofthe source rises to the zener potential, the charge transfer stops,limiting the positive potential applied to the active ICD gate to thezener voltage plus a small delta.

The configuration of transistor M3 with the zener diode preventsexcessive voltage on the gate of the ICD that could potentially cause agate oxide rupture. When the trigger signal changes polarity, the stateof the latch is reversed so that the gate of transistor M3 is drivennegative, at the same time, the gate of transistor M4 is driven positiveso that the gate of the ICD, and the source of transistor M3 are pullednegative.

As can be seen, the gate of the active ICD is driven between an offsignal (V−), and a positive voltage set by the zener diode. This allowsthe on state of the ICD to have a much lower voltage drop than it wouldin the passive state of FIG. 1. Looking at FIGS. 4 and 4A, it can beseen that in both cases the V+ and V− signals are routed to the samepoints within the control circuit, the V+ goes to the resistor side ofthe latch, and the V− to the MOSFET side of the latch. The sense signal,however, is routed to the opposite latch polarity. In FIG. 4 it goes tothe drain of transistor M2, while in FIG. 4A, it goes to the drain oftransistor M1. This is due to the polarity reversal of the sense signal.In both circuits, the forward condition (ICD gate turned on) correspondsto Signal 1 being negative with respect to Signal 2.

While the shaping characteristics of the latch are convenient, in manycases the full latch is not required for the circuit to functioncorrectly. For example, in FIG. 4A, if resistor R3 and transistor M1were eliminated, the circuit would still behave properly with a wellbehaved input signal.

FIG. 5 demonstrates the same control circuit with an N-channel MOSFET.Note that the diode has been reversed so that the voltage across the ICMwhile it is off will charge the capacitor. The sense signal is now thegate input electrode.

FIG. 6 demonstrates the same control circuit, except for a p-channelMOSFET device. Note that all the MOSFETs are now p-channel devices andthe polarity of the voltage to the control circuit is reversed.

In the ICM of FIGS. 5 and 6, the control circuit receives a gate controlsignal and provides an enhanced gate control signal to the field effecttransistor. That enhanced signal may be enhanced in terms of voltageswing (larger swing), or in current drive to rapidly charge anddischarge the transistor gate capacitance, particularly in the case ofpower transistors, in speed of the gate drive transition for increasingthe speed of turn on and turn off, or any combination of these or otherparameters. Also, the ICM may be used in a larger integrated circuit, ormay be packaged as a three terminal device and used in place of aconventional FET for its improved performance.

While certain preferred embodiments of the present invention have beendisclosed and described herein, it will be understood by those skilledin the art that various changes in form and detail may be made thereinwithout departing from the spirit and scope of the invention.

1-41. (canceled)
 42. A circuit comprising: an integrated circuitincluding: a capacitor; a diode; a field effect transistor having asource, a drain and a gate; and, a control circuit; the capacitor andthe diode being connected in series between the source and drain withthe diode being conductive to charge the capacitor when the transistoris turned off, the capacitor being coupled to and acting as the powersupply for the control circuit, the control circuit having a gatecontrol input and providing an output coupled to the gate of the fieldeffect transistor to provide an enhanced gate control signal to thefield effect transistor on both turn on and turn off of the field effecttransistor responsive to the gate control input.
 43. The circuit ofclaim 42 wherein the field effect transistor is an n-channel MOSFET. 44.The circuit of claim 42 wherein the field effect transistor is ap-channel MOSFET.
 45. The circuit of claim 42 wherein the field effecttransistor is an n-channel JFET.
 46. The circuit of claim 42 wherein thefield effect transistor is a p-channel JFET.
 47. The circuit of claim 42wherein the circuit is packaged as a three terminal device.
 48. Thecircuit of claim 42 wherein the enhanced gate control signal to thefield effect transistor is enhanced in voltage swing in comparison tothe gate control input.
 49. The circuit of claim 42 wherein the enhancedgate control signal to the field effect transistor is enhanced incurrent drive in comparison to the gate control input.
 50. The circuitof claim 42 wherein the enhanced gate control signal to the field effecttransistor is enhanced in speed of gate drive transition in comparisonto the gate control input.
 51. A circuit comprising: an integratedcircuit including: a capacitor; a diode; a field effect transistorhaving a source, a drain, a gate and a body connected to the source;and, a control circuit; the capacitor and the diode being connected inseries between the source and drain with the diode being conductive tocharge the capacitor with respect to the source when the transistor isturned off, the capacitor being coupled to and acting as the powersupply for the control circuit, the control circuit having a gatecontrol input and providing an output coupled to the gate of the fieldeffect transistor to provide an enhanced gate control signal to thefield effect transistor on both turn on and turn off of the field effecttransistor responsive to the gate control input, the enhanced gatecontrol signal being responsive to a voltage on the capacitor for fieldeffect transistor turn on and to a voltage on the source for fieldeffect transistor turn off.
 52. The circuit of claim 51 wherein theenhanced gate control signal is coupled to the voltage on the capacitorwhen the field effect transistor is turned on, and is coupled to thesource when the field effect transistor is turned off.
 53. The circuitof claim 52 further comprised of a Zener diode coupled to limit themaximum voltage that may be applied from the capacitor to the gate. 54.The circuit of claim 53 wherein the control circuit includes a bistablecircuit responsive to the gate control input.
 55. The circuit of claim51 wherein the control circuit includes a bistable circuit responsive tothe gate control input.
 56. The circuit of claim 51 wherein the fieldeffect transistor is an n-channel MOSFET.
 57. The circuit of claim 51wherein the field effect transistor is a p-channel MOSFET.
 58. Thecircuit of claim 51 wherein the field effect transistor is an n-channelJFET.
 59. The circuit of claim 51 wherein the field effect transistor isa p-channel JFET.
 60. The circuit of claim 51 wherein the circuit ispackaged as a three terminal device.
 61. A method of enhancing a gatecontrol signal input for a field effect transistor having a source, adrain and a gate and responsive to a gate control signal comprising:coupling a capacitor and a diode in series between the source and drain,the capacitor being coupled to the source, to charge the capacitor froma source-drain voltage when the field effect transistor is turned off;powering a gate control circuit by the voltage on the capacitor;coupling the gate control signal to the gate control circuit; when thegate control signal indicates the field effect transistor is to beturned on, causing the gate control circuit to couple the gate to thevoltage on the capacitor; and, when the gate control signal indicatesthe field effect transistor is to be turned off, causing the gatecontrol circuit to couple the gate to the source.
 62. The method ofclaim 61 wherein the gate control circuit includes a bistable circuit.63. The method of claim 61 further comprised of limiting the maximumvoltage on the capacitor that may be coupled to the gate.